Intel's packaging push eyes AI billions
Source: wired.com
TL;DR
- Intel is ramping up advanced chip packaging at its New Mexico and Malaysia plants to capture AI demand.
- Foundry CFO projects packaging revenue well north of $1 billion, with deals in billions per year close.
- Packaging innovations like EMIB-T could help Intel challenge TSMC and revive its foundry business.
The story at a glance
Intel is betting big on advanced chip packaging-combining chiplets into custom AI chips-as a growth driver amid its foundry push. The company revived a New Mexico fab with CHIPS Act funds and is expanding in Malaysia, while talking with customers like Google and Amazon. This comes as AI fuels demand for efficient packaging, reported now as Intel signals revenue jumps and tech rollouts like EMIB-T. Packaging has evolved from basic assembly to critical for dense, power-efficient AI systems.
Key points
- Intel restarted Fab 9 in Rio Rancho, New Mexico, in 2024 with $500 million from the CHIPS Act; it now handles advanced packaging alongside Fab 11X.
- CEO Lip-Bu Tan calls packaging a "very big differentiator"; CFO Dave Zinsner expects revenue "well north of $1 billion" and deals worth "billions of dollars per year."
- Intel in talks with Google and Amazon for packaging services, though neither confirms.
- Technologies include EMIB (2017, shrinks connections), Foveros (2019, die-stacking), and EMIB-T (announced 2025, improves efficiency), rolling out this year.
- TSMC leads with CoWoS and SoIC, but Intel positions its methods as more "surgical."
- Expansion in Penang, Malaysia, for assembly and test amid global demand.
- Foundry head Naga Chandrasekaran says packaging will "transform how this AI revolution comes to fruition over the next decade."
Details and context
Advanced packaging stacks components like processors and high-bandwidth memory in 2D or 3D to pack more power into limited space, driven by AI's compute needs. It goes beyond wafer fabrication, handling the "back end" where chips get integrated-customers can tap Intel at any stage.
Intel trails TSMC in scale but invests in unique bridges like EMIB-T for better signal integrity and efficiency. Challenges include securing big customers and scaling production; analyst Jim McGregor notes it's hard to ramp like wafers.
AI demand strains packaging worldwide-TSMC's CoWoS is booked solid by Nvidia and others, creating openings for Intel's U.S.-based capacity.
Key quotes
- "Ironically, the more interesting part of the Foundry business today" - Dave Zinsner, Intel CFO, on packaging at Morgan Stanley conference.[[1]](https://www.wired.com/story/why-chip-packaging-could-decide-the-next-phase-of-the-ai-boom/)[[2]](https://www.wired.com/story/why-chip-packaging-could-decide-the-next-phase-of-the-ai-boom)
- "Even more so than the silicon itself, chip packaging is going to transform how this AI revolution comes to fruition over the next decade." - Naga Chandrasekaran, Intel Foundry head.[[1]](https://www.wired.com/story/why-chip-packaging-could-decide-the-next-phase-of-the-ai-boom/)
Why it matters
AI's hunger for dense, efficient chips makes packaging a new bottleneck beyond just making wafers. For tech giants designing custom AI silicon, it means more supplier options like Intel could ease TSMC constraints and cut costs long-term; investors eye it as Intel's foundry turnaround bet. Watch if Google/Amazon deals close and EMIB-T yields scale, though customer wins remain unconfirmed.